#ifndef __RRC_CONSTANTS_H__INCLUDED__
#define __RRC_CONSTANTS_H__INCLUDED__

#include <stdint.h>

const uint8_t INIT_VALUE_8BITS = 0xff;
const uint16_t INIT_VALUE_16BITS = 0xffff;
const uint32_t INIT_VALUE_32BITS = 0xffffffff;

const uint8_t MIN_FREQ_BAND = 1;
const uint8_t MAX_FREQ_BAND = 64;
const uint8_t MIN_RSSI = 0;
const uint8_t MAX_RSSI = 128;
const uint16_t MIN_EARFCN = 0;
const uint16_t MAX_EARFCN = 65535;
const uint8_t MIN_RSRP = 0;
const uint8_t MAX_RSRP = 128;
const uint16_t MIN_PCI = 0;
const uint16_t MAX_PCI = 503;
const uint16_t MIN_SYS_FRAME_NUM = 0;
const uint16_t MAX_SYS_FRAME_NUM = 1023;

const uint16_t MIN_CELL_INTRA = 1;
const uint16_t MAX_CELL_INTRA = 16;

const uint16_t MIN_SI = 1;
const uint16_t MAX_SI = 32;

enum RrcMessageType
{
    INVALID_RRC_MESSAGE_TYPE = 0,

    SYSTEM_INFORMATION_BLOCK_TYPE1 = 1,
    SYSTEM_INFORMATION_BLOCKS = 2
};

enum NumTransmitAntennas
{
    TRANSMIT_ANTENNAS_ONE = 1,
    TRANSMIT_ANTENNAS_TWO = 2,
    TRANSMIT_ANTENNAS_FOUR = 4,
    MIN_TRANSMIT_ANTENNAS = TRANSMIT_ANTENNAS_ONE,
    MAX_TRANSMIT_ANTENNAS = TRANSMIT_ANTENNAS_FOUR
};

enum PhichResource
{
    PHICH_RESOURCE_ONE_SIXTH = 0,
    PHICH_RESOURCE_ONE_HALF = 1,
    PHICH_RESOURCE_ONE = 2,
    PHICH_RESOURCE_TWO = 3,
    MIN_PHICH_RESOURCE = PHICH_RESOURCE_ONE_SIXTH,
    MAX_PHICH_RESOURCE = PHICH_RESOURCE_TWO
};

enum PhichDuration
{
    PHICH_DUR_NORMAL = 0,
    PHICH_DUR_EXTENTED = 1,
    MIN_PHICH_DURATION = PHICH_DUR_NORMAL,
    MAX_PHICH_DURATION = PHICH_DUR_EXTENTED
};


enum DlSystemBandwith
{
    DL_SYS_BW_6 = 6,
    DL_SYS_BW_15 = 15,
    DL_SYS_BW_25 = 25,
    DL_SYS_BW_50 = 50,
    DL_SYS_BW_75 = 75,
    DL_SYS_BW_100 = 100,
    MIN_DL_SYS_BW = DL_SYS_BW_6,
    MAX_DL_SYS_BW = DL_SYS_BW_100
};

enum SystemInformationWindow
{
    SI_WINDOW_1 = 1,
    SI_WINDOW_2 = 2,
    SI_WINDOW_5 = 5,
    SI_WINDOW_10 = 10,
    SI_WINDOW_15 = 15,
    SI_WINDOW_20 = 20,
    SI_WINDOW_40 = 40,
    MIN_SI_WINDOW = SI_WINDOW_1,
    MAX_SI_WINDOW = SI_WINDOW_40
};

enum SystemBandwidth
{
    SYSTEM_BAND_WIDTH_N6   = 0,     
    SYSTEM_BAND_WIDTH_N15  = 1,
    SYSTEM_BAND_WIDTH_N25  = 2,
    SYSTEM_BAND_WIDTH_N50  = 3,
    SYSTEM_BAND_WIDTH_N75  = 4,
    SYSTEM_BAND_WIDTH_N100 = 5,
    SYSTEM_BAND_WIDTH_SPARE10 = 6,
    SYSTEM_BAND_WIDTH_SPARE9  = 7,
    SYSTEM_BAND_WIDTH_SPARE8  = 8,
    SYSTEM_BAND_WIDTH_SPARE7  = 9,
    SYSTEM_BAND_WIDTH_SPARE6  = 10,
    SYSTEM_BAND_WIDTH_SPARE5  = 11,
    SYSTEM_BAND_WIDTH_SPARE4  = 12,
    SYSTEM_BAND_WIDTH_SPARE3  = 13,
    SYSTEM_BAND_WIDTH_SPARE2  = 14,
    SYSTEM_BAND_WIDTH_SPARE1  = 15,
    NUM_OF_SYSTEM_BAND_WIDTH,
    MIN_SYSTEM_BAND_WIDTH = SYSTEM_BAND_WIDTH_N6,
    MAX_SYSTEM_BAND_WIDTH = NUM_OF_SYSTEM_BAND_WIDTH - 1
};

enum RrcSiWindowLength
{
    SI_WIND_LEN_MS1 = 0,
    SI_WIND_LEN_MS2 = 1,
    SI_WIND_LEN_MS5 = 2,
    SI_WIND_LEN_MS10 = 3,
    SI_WIND_LEN_MS15 = 4,
    SI_WIND_LEN_MS20 = 5,
    SI_WIND_LEN_MS40 = 6,
    SI_WIND_LEN_SPARE1 = 7,
    NUM_SI_WINLEN
};

enum CellBarred
{
    BARRED = 0,
    NOT_BARRED = 1,
    NUM_CELL_BARRED
};

enum CellReservationExtension
{
    CELL_RESERV_EXT_RESERVED = 0,
    CELL_RESERV_EXT_NOT_RESERVED = 1,
    NUM_CELL_RESERV_EXT
};

enum RrcSubFrameAssignment
{
    SUB_FRM_ASSGN_SA0 = 0,
    SUB_FRM_ASSGN_SA1 = 1,
    SUB_FRM_ASSGN_SA2 = 2,
    SUB_FRM_ASSGN_SA3 = 3,
    SUB_FRM_ASSGN_SA4 = 4,
    SUB_FRM_ASSGN_SA5 = 5,
    SUB_FRM_ASSGN_SA6 = 6,
    NUM_SUB_FRM_ASSGN
};

enum RrcSpecSubFramePatterns
{
    FRM_PATTERN_SSP0 = 0,
    FRM_PATTERN_SSP1 = 1,
    FRM_PATTERN_SSP2 = 2,
    FRM_PATTERN_SSP3 = 3,
    FRM_PATTERN_SSP4 = 4,
    FRM_PATTERN_SSP5 = 5,
    FRM_PATTERN_SSP6 = 6,
    FRM_PATTERN_SSP7 = 7,
    FRM_PATTERN_SSP8 = 8,
    NUM_SUB_FRM_PATTERN
};

enum QHyst
{
    Q_HYST_DB0 = 0,
    Q_HYST_DB1 = 1,
    Q_HYST_DB2 = 2,
    Q_HYST_DB3 = 3,
    Q_HYST_DB4 = 4,
    Q_HYST_DB5 = 5,
    Q_HYST_DB6 = 6,
    Q_HYST_DB8 = 7,
    Q_HYST_DB10 = 8,
    Q_HYST_DB12 = 9,
    Q_HYST_DB14 = 10,
    Q_HYST_DB16 = 11,
    Q_HYST_DB18 = 12,
    Q_HYST_DB20 = 13,
    Q_HYST_DB22 = 14,
    Q_HYST_DB24 = 15,
    NUM_Q_HYST
};

enum MeasurementBandwidth
{
    MBW6 = 0,
    MBW15 = 1,
    MBW25 = 2,
    MBW50 = 3,
    MBW75 = 4,
    MBW100 = 5,
    NUM_OF_MEAS_BW,
    MIN_MEAS_BW = MBW6,
    MAX_MEAS_BW = NUM_OF_MEAS_BW - 1
};

enum QOffsetCell
{
    Q_OFFSET_CELL_DB_24 = 0,    // db -24
    Q_OFFSET_CELL_DB_22 = 1,    // db -22
    Q_OFFSET_CELL_DB_20 = 2,    // db -20
    Q_OFFSET_CELL_DB_18 = 3,    // db -18
    Q_OFFSET_CELL_DB_16 = 4,    // db -16
    Q_OFFSET_CELL_DB_14 = 5,    // db -14
    Q_OFFSET_CELL_DB_12 = 6,    // db -12
    Q_OFFSET_CELL_DB_10 = 7,    // db -10
    Q_OFFSET_CELL_DB_8 = 8,    // db -8
    Q_OFFSET_CELL_DB_6 = 9,    // db -6
    Q_OFFSET_CELL_DB_5 = 10,    // db -5
    Q_OFFSET_CELL_DB_4 = 11,    // db -4
    Q_OFFSET_CELL_DB_3 = 12,    // db -3
    Q_OFFSET_CELL_DB_2 = 13,    // db -2
    Q_OFFSET_CELL_DB_1 = 14,    // db -1
    Q_OFFSET_CELL_DB0 = 15,    // db 0
    Q_OFFSET_CELL_DB1 = 16,    // db 1
    Q_OFFSET_CELL_DB2 = 17,    // db 2
    Q_OFFSET_CELL_DB3 = 18,    // db 3
    Q_OFFSET_CELL_DB4 = 19,    // db 4
    Q_OFFSET_CELL_DB5 = 20,    // db 5
    Q_OFFSET_CELL_DB6 = 21,    // db 6
    Q_OFFSET_CELL_DB8 = 22,    // db 8
    Q_OFFSET_CELL_DB10 = 23,    // db 10
    Q_OFFSET_CELL_DB12 = 24,    // db 12
    Q_OFFSET_CELL_DB14 = 25,    // db 14
    Q_OFFSET_CELL_DB16 = 26,    // db 10
    Q_OFFSET_CELL_DB18 = 27,    // db 18
    Q_OFFSET_CELL_DB20 = 28,    // db 20
    Q_OFFSET_CELL_DB22 = 29,    // db 22
    Q_OFFSET_CELL_DB24 = 30,    // db 24
    Q_OFFSET_CELL_SPARE1 = 31,
    NUM_OF_Q_OFFSET_CELL,
    MIN_Q_OFFSET_CELL = Q_OFFSET_CELL_DB_24,
    MAX_Q_OFFSET_CELL = NUM_OF_Q_OFFSET_CELL - 1
};

enum ReservFlag
{
    RESERV_FLAG_RESERVED = 0,
    RESERV_FLAG_NOT_RESERVED = 1,
    NUM_RESERV_FLAG
}; 

enum Periodicity
{
    PERIODICITY_RF8 = 0,
    PERIODICITY_RF16 = 1,
    PERIODICITY_RF32 = 2,
    PERIODICITY_RF64 = 3,
    PERIODICITY_RF128 = 4,
    PERIODICITY_RF256 = 5,
    PERIODICITY_RF512 = 6,
    PERIODICITY_SPARE = 7,
    NUM_OF_PERIODICITY,
    MIN_PERIODICITY = PERIODICITY_RF8,
    MAX_PERIODICITY = NUM_OF_PERIODICITY - 1
};

enum SibType
{
    SIB_TYPE2 = 0,
    SIB_TYPE3 = 1,
    SIB_TYPE4 = 2,
    SIB_TYPE5 = 3,
    SIB_TYPE6 = 4,
    SIB_TYPE7 = 5,
    SIB_TYPE8 = 6,
    SIB_TYPE9 = 7,
    SIB_TYPE10 = 8,
    SIB_TYPE11 = 9,
    SIB_TYPE12 = 10,
    SIB_TYPE13 = 11,
    SIB_TYPE_SPARE4 = 12,
    SIB_TYPE_SPARE3 = 13,
    SIB_TYPE_SPARE2 = 14,
    SIB_TYPE_SPARE1 = 15,
    NUM_OF_SIB_TYPE,
    MIN_SIB_TYPE = SIB_TYPE2,
    MAX_SIB_TYPE = NUM_OF_SIB_TYPE - 1
};

enum EvalHystNormal
{
    VAL_HYST_NORMAL_S30 = 0,
    VAL_HYST_NORMAL_S60 = 1,
    VAL_HYST_NORMAL_S120 = 2,
    VAL_HYST_NORMAL_S180 = 3,
    VAL_HYST_NORMAL_S240 = 4,
    VAL_HYST_NORMAL_SPARE3_2 = 5,
    VAL_HYST_NORMAL_SPARE2_2 = 6,
    VAL_HYST_NORMAL_SPARE1_3 = 7,
    NUM_EVAL_HYST_NORMAL,
    MIN_EVAL_HYST_NORMAL = VAL_HYST_NORMAL_S30,
    MAX_EVAL_HYST_NORMAL = NUM_EVAL_HYST_NORMAL - 1
};

enum HystSF
{
    HYST_SF_DB_6 = 0,
    HYST_SF_DB_4_1 = 1,
    HYST_SF_DB_2 = 2,
    HYST_SF_DB0 = 3,
    HYST_SF_DB2 = 4,
    HYST_SF_DB4 = 5,
    HYST_SF_DB6 = 6,
    HYST_SF_SPARE_1 = 7,
    NUM_OF_HYST_SF,
    MIN_HYST_SF = HYST_SF_DB_6,
    MAX_HYST_SF = NUM_OF_HYST_SF - 1
};

enum EutranSF
{
    EUTRAN_SF_O_DOT25 = 0,
    EUTRAN_SF_O_DOT5 = 1,
    EUTRAN_SF_O_DOT75 = 2,
    EUTRAN_SF_1_DOT0 = 3,
    NUM_OF_EUTRAN_SF,
    MIN_EUTRAN_SF = EUTRAN_SF_O_DOT25,
    MAX_EUTRAN_SF = NUM_OF_EUTRAN_SF - 1
};


#endif

